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» Fabrication of 3D Packaging TSV using DRIE
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CORR
2008
Springer
194views Education» more  CORR 2008»
13 years 4 months ago
Fabrication of 3D Packaging TSV using DRIE
Emerging 3D chips stacking and MEMS/Sensors packaging technologies are using DRIE (Deep Reactive Ion Etching) to etch Through-Silicon Via (TSV) for advanced interconnections. The ...
M. Puech, Jean-Marc Thevenoud, J. M. Gruffat, N. L...
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
13 years 9 months ago
3D-integration of silicon devices: A key technology for sophisticated products
—3D integration is a key solution to the predicted performance increase of future electronic systems. It offers extreme miniaturization and fabrication of More than Moore product...
Armin Klumpp, Peter Ramm, R. Wieland
CORR
2008
Springer
148views Education» more  CORR 2008»
13 years 4 months ago
Copper Electrodeposition for 3D Integration
Abstract-Two dimensional (2D) integration has been the traditional approach for IC integration. Increasing demands for providing electronic devices with superior performance and fu...
Rozalia Beica, Charles Sharbono, Tom Ritzdorf
ISCAS
2006
IEEE
152views Hardware» more  ISCAS 2006»
13 years 10 months ago
3D integrated sensors in silicon-on-sapphire CMOS
We fabricated a 3D-integrated multi-chip sensor separate dies [9]. In this paper, we present a 3D integrated and actuator and demonstrated the ability of communication with tempera...
Eugenio Culurciello, Andreas G. Andreou
ISCAS
2005
IEEE
162views Hardware» more  ISCAS 2005»
13 years 10 months ago
Capacitive coupling of data and power for 3D silicon-on-insulator VLSI
— We designed a 3D integrated multi-chip module that uses non-galvanic capacitive coupling to provide bi-directional communication and exchange power supply between two separate ...
Eugenio Culurciello, Andreas G. Andreou