24 search results - page 4 / 5 » Fast and accurate rectilinear steiner minimal tree algorithm... |
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
TCAD
2002
13 years 5 months ago
2002
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
GLVLSI
2003
IEEE
13 years 11 months ago
2003
IEEE
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
STOC
2003
ACM
14 years 6 months ago
2003
ACM
Given an undirected graph or an Eulerian directed graph G and a subset S of its vertices, we show how to determine the edge connectivity C of the vertices in S in time O(C3 n log ...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...