12 search results - page 2 / 3 » Fault Coverage Estimation for Early Stage of VLSI Design |
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
VLSID
2008
IEEE
14 years 5 months ago
2008
IEEE
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
SBCCI
2005
ACM
13 years 10 months ago
2005
ACM
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
DFT
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents theoretical yet practical methodologies to model, assure and optimize the Reliability of Clockless Wave Pipeline. Clockless wave pipeline is a cutting-edge and...