Fault diagnosis is to predict the potential fault sites in a logic IC. In this paper, we particularly address the problem of diagnosing faults that exhibit the so-called Byzantine...
Faults in hardware and software are not totally avoidable not even if the components are carefully designed, implemented and tested. In this paper we present a solution for detecti...
The first non-enumerative framework for diagnosing path delay faults using zero suppressed binary decision diagrams is introduced. We show that fault free path delay faults with ...
This paper proposes a diagnosis architecture that integrates consistency based diagnosis with induced time series classifiers, trying to combine the advantages of both methods. Co...