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» Fault emulation: a new approach to fault grading
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ICCAD
1995
IEEE
67views Hardware» more  ICCAD 1995»
13 years 8 months ago
Fault emulation: a new approach to fault grading
Kwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai
DATE
2005
IEEE
101views Hardware» more  DATE 2005»
13 years 10 months ago
Techniques for Fast Transient Fault Grading Based on Autonomous Emulation
Very deep submicron and nanometer technologies have increased notably integrated circuit (IC) sensitiveness to radiation. Soft errors are currently appearing into ICs working at e...
Celia López-Ongil, Mario García-Vald...
ITC
2002
IEEE
102views Hardware» more  ITC 2002»
13 years 9 months ago
Fault Grading FPGA Interconnect Test Configurations
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...
Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin T...
DSD
2005
IEEE
105views Hardware» more  DSD 2005»
13 years 10 months ago
Improved Fault Emulation for Synchronous Sequential Circuits
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, R...
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...