Sciweavers

97 search results - page 3 / 20
» Flexible and abstract communication and interconnect modelin...
Sort
View
CISIS
2009
IEEE
14 years 18 days ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
JSS
2006
104views more  JSS 2006»
13 years 5 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
CDC
2010
IEEE
101views Control Systems» more  CDC 2010»
13 years 23 days ago
Performance-oriented communication topology design for large-scale interconnected systems
Abstract-- Communication networks provide a larger flexibility with respect to the control design of large-scale interconnected systems by allowing the information exchange between...
Azwirman Gusrialdi, Sandra Hirche
CODES
2009
IEEE
14 years 16 days ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens
DAC
2001
ACM
14 years 6 months ago
Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design
Communication-based design represents a formal approach to systemon-a-chip design that considers communication between components as important as the computations they perform. Ou...
Marco Sgroi, Michael Sheets, Andrew Mihal, Kurt Ke...