We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Abstract. We propose a verification method for parameterized systems with global conditions. The method is based on context-sensitive constraints, a symbolic representation of infi...
Parosh Aziz Abdulla, Giorgio Delzanno, Ahmed Rezin...
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
Probabilistic timed automata (PTAs) are used for formal modelling and verification of systems with probabilistic, nondeterministic and real-time behaviour. For non-probabilistic ti...
This paper describes a study of a class of algorithms for the floating-point divide and square root operations, based on the Newton-Raphson iterative method. The two main goals we...
Marius A. Cornea-Hasegan, Roger A. Golliver, Peter...