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DATE
2000
IEEE
128views Hardware» more  DATE 2000»
13 years 10 months ago
A Bus Delay Reduction Technique Considering Crosstalk
As the CMOS technology scaled down, the horizontal coupling capacitance between adjacent wires plays dominant part in wire load, crosstalk interference becomes a serious problem f...
Kei Hirose, Hiroto Yasuura
ICCAD
2008
IEEE
223views Hardware» more  ICCAD 2008»
14 years 2 months ago
Decoupling capacitance allocation for timing with statistical noise model and timing analysis
Abstract— This paper presents an allocation method of decoupling capacitance that explicitly considers timing. We have found and focused that decap does not necessarily improve a...
Takashi Enami, Masanori Hashimoto, Takashi Sato
ICCAD
2003
IEEE
379views Hardware» more  ICCAD 2003»
14 years 2 months ago
A Statistical Gate-Delay Model Considering Intra-Gate Variability
This paper proposes a model for calculating statistical gate-delay variation caused by intra-chip and inter-chip variability. As the variation of individual gate delays directly i...
Ken-ichi Okada, Kento Yamaoka, Hidetoshi Onodera
ASPDAC
1998
ACM
74views Hardware» more  ASPDAC 1998»
13 years 9 months ago
Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines
— Simple yet useful analytical formulas for delay, slope and crosstalk noise amplitude for capacitively coupled two-, three- and infinite-line systems are derived assuming bus li...
Hiroshi Kawaguchi, Takayasu Sakurai
TCAD
2010
130views more  TCAD 2010»
13 years 8 days ago
On ATPG for Multiple Aggressor Crosstalk Faults
Crosstalk faults have emerged as a significant mechanism for circuit failure. Long signal nets are of particular concern because they tend to have a higher coupling capacitance to...
Kunal P. Ganeshpure, Sandip Kundu