38 search results - page 7 / 8 » Generation of Synthetic Sequential Benchmark Circuits |
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
ICCAD
1995
IEEE
13 years 9 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
ICCD
2001
IEEE
14 years 2 months ago
2001
IEEE
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
ICCAD
2003
IEEE
13 years 11 months ago
2003
IEEE
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
ATS
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we propose an oscillation-based test methodology for sequential testing. This approach provides many advantages over traditional methods. (1) It is at-speed testing...