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VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 6 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...
DFT
2004
IEEE
95views VLSI» more  DFT 2004»
13 years 9 months ago
Mixed Loopback BiST for RF Digital Transceivers
In this paper we analyze the performance of a mixed built-in-self-test (BiST) for RF IC digital transceivers, where a baseband processor can be used both as a test pattern generat...
Jerzy Dabrowski, Javier Gonzalez Bayon
JAIR
2010
165views more  JAIR 2010»
13 years 4 months ago
A Model-Based Active Testing Approach to Sequential Diagnosis
Model-based diagnostic reasoning often leads to a large number of diagnostic hypotheses. The set of diagnoses can be reduced by taking into account extra observations (passive mon...
Alexander Feldman, Gregory M. Provan, Arjan J. C. ...
ATS
2009
IEEE
135views Hardware» more  ATS 2009»
14 years 18 days ago
On Scan Chain Diagnosis for Intermittent Faults
Diagnosis is increasingly important, not only for individual analysis of failing ICs, but also for high-volume test response analysis which enables yield and test improvement. Sca...
Dan Adolfsson, Joanna Siew, Erik Jan Marinissen, E...
DAC
2000
ACM
14 years 6 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski