25 search results - page 1 / 5 » Hardware implementation of communication protocols modeled b... |
DAC
2000
ACM
14 years 6 months ago
2000
ACM
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
FORTE
1998
13 years 7 months ago
1998
: In this paper, we propose a technique for hardware implementation of protocol specifications in LOTOS. For the purpose, we define a new model called synchronous EFSMs consisting ...
MICRO
2010
IEEE
13 years 16 days ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
VLSID
2008
IEEE
14 years 6 months ago
2008
IEEE
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
DSD
2006
IEEE
13 years 9 months ago
2006
IEEE
We present a performance-oriented refinement approach that refines a perfectly synchronous communication model onto Network-on-Chip (NoC) communication. We first identify four bas...