31 search results - page 2 / 7 » High Level Synthesis of Pipelined Instruction Set Processors... |
ISCA
2002
IEEE
13 years 9 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
TVLSI
2008
13 years 4 months ago
2008
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
SBCCI
2006
ACM
13 years 10 months ago
2006
ACM
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
ASPLOS
1998
ACM
13 years 9 months ago
1998
ACM
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
By coupling a reconfigurable hardware to a standard processor, high levels of flexibility and adaptability are achieved. However, this approach requires modifications to the compi...