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ASAP
2000
IEEE
96views Hardware» more  ASAP 2000»
13 years 8 months ago
High-Level Synthesis of Nonprogrammable Hardware Accelerators
Robert Schreiber, Shail Aditya, B. Ramakrishna Rau...
VLSISP
2002
79views more  VLSISP 2002»
13 years 4 months ago
PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators
Robert Schreiber, Shail Aditya, Scott A. Mahlke, V...
ARC
2008
Springer
99views Hardware» more  ARC 2008»
13 years 6 months ago
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
Hagen Gädke, Andreas Koch
HPCA
2009
IEEE
14 years 4 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
FCCM
2011
IEEE
331views VLSI» more  FCCM 2011»
12 years 8 months ago
Synthesis of Platform Architectures from OpenCL Programs
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
Muhsen Owaida, Nikolaos Bellas, Konstantis Dalouka...