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» ILP Models for the Synthesis of Asynchronous Control Circuit...
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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
13 years 11 months ago
ILP Based Gate Leakage Optimization Using DKCMOS Library during RTL Synthesis
In this paper dual-K (DKCMOS) technology is proposed as a method for gate leakage power reduction. An integer linear programming (ILP) based algorithm is proposed for its optimiza...
Saraju P. Mohanty
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 9 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...
IFIP
1993
Springer
13 years 9 months ago
Automatic Synthesis of Fast Compact Asynchronous Control Circuits
Al Davis, Bill Coates, Ken Stevens
DAC
2006
ACM
14 years 6 months ago
State encoding of large asynchronous controllers
A novel method to solve the state encoding problem in Signal Transition Graphs is presented. It is based on the structural theory of Petri nets and can be applied to large specifi...
Josep Carmona, Jordi Cortadella
EURODAC
1994
IEEE
123views VHDL» more  EURODAC 1994»
13 years 9 months ago
Testing redundant asynchronous circuits by variable phase splitting
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...
Luciano Lavagno, Antonio Lioy, Michael Kishinevsky