44 search results - page 7 / 9 » ISDL: An Instruction Set Description Language for Retargetab... |
ASAP
2008
IEEE
13 years 7 months ago
2008
IEEE
Automatic generation of custom instruction processors from high-level application descriptions enables fast design space exploration, while offering very favorable performance and...
DAC
2005
ACM
13 years 7 months ago
2005
ACM
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
RAS
2010
13 years 3 months ago
2010
This article investigates fundamental issues in scaling autonomous personal robots towards open-ended sets of everyday manipulation tasks which involve high complexity and vague j...
FPGA
2004
ACM
13 years 11 months ago
2004
ACM
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
FPGA
2010
ACM
14 years 2 months ago
2010
ACM
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...