305 search results - page 1 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
PDP
2010
IEEE
13 years 11 months ago
2010
IEEE
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
JSA
2010
12 years 11 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
PPL
2008
13 years 4 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
We present the implementation and analysis of a variation tolerant version of a switch-to-switch link in a NoC. The goal is to tolerate the effects of process variations on NoC ar...