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FCCM
1999
IEEE
143views VLSI» more  FCCM 1999»
13 years 9 months ago
Implementation and Evaluation of a Prototype Reconfigurable Router
The evolution of computer networking technology will likely require hardware that is flexible enough to adapt to changing standards while maintaining the highest possible performa...
Jason R. Hess, David C. Lee, Scott J. Harper, Mark...
DAC
2008
ACM
14 years 5 months ago
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
Zhen Zhang, Alain Greiner, Sami Taktak
JCM
2010
119views more  JCM 2010»
13 years 3 months ago
Evaluation of Router Implementations for Explicit Congestion Control Schemes
— Explicit congestion control schemes use router feedback to overcome limitations of the standard mechanisms of the Transmission Control Protocol (TCP). These approaches require ...
Simon Hauger, Michael Scharf, Jochen Kögel, C...
FPL
2009
Springer
142views Hardware» more  FPL 2009»
13 years 8 months ago
Cooperative multithreading in dynamically reconfigurable systems
Preemptive multitasking, a popular technique for timesharing of computational resources in software-based systems, faces considerable difficulties when applied to partially reconf...
Enno Lübbers, Marco Platzner
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 8 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...