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FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 8 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
CODES
2005
IEEE
13 years 6 months ago
Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures
System design based on static task graphs does not match well with modern consumer electronic devices with dynamic stream processing applications. We propose the TTL API for task ...
Tomas Henriksson, Jeffrey Kang, Pieter van der Wol...
DAC
1999
ACM
13 years 9 months ago
Dynamically Reconfigurable Architecture for Image Processor Applications
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
Alexandro M. S. Adário, Eduardo L. Roehe, S...
RSP
2006
IEEE
116views Control Systems» more  RSP 2006»
13 years 11 months ago
Performance Evaluation of an Adaptive FPGA for Network Applications
This paper presents the design and the performance evaluation of a coarse-grain dynamically reconfigurable platform for network applications. The platform consists of two MicroBla...
Christoforos Kachris, Stamatis Vassiliadis
FPL
2006
Springer
108views Hardware» more  FPL 2006»
13 years 8 months ago
Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
James Moscola, Young H. Cho, John W. Lockwood