214 search results - page 1 / 43 » Improved Boundary Scan Design |
ITC
1995
IEEE
13 years 8 months ago
1995
IEEE
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
Delay defects on I/O pads, interconnections of a board, or interconnections among embedded cores can not be tested with the current IEEE 1149.1 boundary scan design. This paper in...
ITC
1996
IEEE
13 years 8 months ago
1996
IEEE
The P1149.4 mixed-signal boundary scan standard is demonstrated with a CMOS integrated circuit. Design issues and characterization data are presented.
ATS
1996
IEEE
13 years 8 months ago
1996
IEEE
In this paper, we present a novel and efticient approach to test MCM at the module as well as chip levels. Our design incorporates the concept of the multifrequency test method an...
BMCBI
2010
13 years 4 months ago
2010
Background: Cell volume determination plays a pivotal role in the investigation of the biophysical mechanisms underlying various cellular processes. Whereas light microscopy in pr...