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» Improving Design and Verification Productivity with VHDL-200...
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DATE
2004
IEEE
129views Hardware» more  DATE 2004»
13 years 8 months ago
Improving Design and Verification Productivity with VHDL-200x
Stephen Bailey, Erich Marschner, Jayaram Bhasker, ...
DAC
2009
ACM
13 years 11 months ago
Beyond verification: leveraging formal for debugging
The latest advancements in the commercial formal model checkers have enabled the integration of formal property verification with the conventional testbench based methods in the o...
Rajeev K. Ranjan, Claudionor Coelho, Sebastian Ska...
ECBS
2010
IEEE
209views Hardware» more  ECBS 2010»
13 years 9 months ago
Continuous Verification of Large Embedded Software Using SMT-Based Bounded Model Checking
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall pr...
Lucas Cordeiro, Bernd Fischer 0002, João Ma...
FPL
2009
Springer
107views Hardware» more  FPL 2009»
13 years 9 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
DAC
2007
ACM
13 years 8 months ago
Statistical Framework for Technology-Model-Product Co-Design and Convergence
This paper presents a statistical framework to cooperatively design and develop technology, product circuit, benchmarking and model early in the development stage. The statistical...
Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Jean-Ol...