27 search results - page 2 / 6 » Improving the Efficiency of Power Simulators by Input Vector... |
TCAD
1998
13 years 5 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
ARCS
2009
Springer
13 years 12 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
HIPEAC
2007
Springer
13 years 9 months ago
2007
Springer
Fine-grained program power behavior is useful in both evaluating power optimizations and observing power optimization opportunities. Detailed power simulation is time consuming and...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
We introduce a novel method of test generation for microprocessors at the RTL using spectral methods. Test vectors are generated for RTL faults, which are the stuck-at faults on i...
ASPDAC
2010
ACM
13 years 3 months ago
2010
ACM
In this paper, we present a new voltage IR drop analysis approach for large on-chip power delivery networks. The new approach is based on recently proposed sampling based reductio...