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MICRO
2006
IEEE
115views Hardware» more  MICRO 2006»
13 years 11 months ago
Mitigating the Impact of Process Variations on Processor Register Files and Execution Units
Design variability due to die-to-die and within-die process variations has the potential to significantly reduce the maximum operating frequency and the effective yield of high-p...
Xiaoyao Liang, David Brooks
EMSOFT
2004
Springer
13 years 11 months ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
HPCA
1998
IEEE
13 years 10 months ago
Virtual-Physical Registers
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pi...
Antonio González, José Gonzál...
CASES
2006
ACM
13 years 9 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
ECOOP
2004
Springer
13 years 11 months ago
Increasing Concurrency in Databases Using Program Analysis
Programmers have come to expect better integration between databases and the programming languages they use. While this trend continues unabated, database concurrency scheduling ha...
Roman Vitenberg, Kristian Kvilekval, Ambuj K. Sing...