10 search results - page 1 / 2 » Look-up Tables (LUTs) for Multiple-Valued, Combinational Log... |
ISMVL
1998
IEEE
13 years 9 months ago
1998
IEEE
The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiplevalued LUT can be implemented using both current-mode and voltage-mode ...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
— This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascade...
ICCAD
2002
IEEE
13 years 9 months ago
2002
IEEE
The paper describes the folding method of logic functions to reduce the size of memories for keeping the functions. The folding is based on the relation of fractions of logic func...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
In this poster, we propose four new heterogeneous programmable logic blocks (PLBs) consisting of a combination of various sizes of look up tables (LUTs), multiplexers (MUXes), and...
GLVLSI
1998
IEEE
13 years 9 months ago
1998
IEEE
A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The stat...