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DFT
2003
IEEE
246views VLSI» more  DFT 2003»
13 years 10 months ago
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...
Konstantinos Rokas, Yiorgos Makris, Dimitris Gizop...
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
13 years 8 months ago
On Concurrent Error Detection with Bounded Latency in FSMs
We discuss the problem of concurrent error detection (CED) with bounded latency in finite state machines (FSMs). The objective of this approach is to reduce the overhead of CED, a...
Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
IJCSA
2007
101views more  IJCSA 2007»
13 years 4 months ago
Concurrent Error Detection in S-boxes
In this paper we present low -cost, concurrent checking methods for multiple error detection in S-boxes of symmetric block ciphers. These are redundancy-based fault detection sche...
Ewa Idzikowska, Krzysztof Bucholc
DSD
2006
IEEE
113views Hardware» more  DSD 2006»
13 years 6 months ago
Cascade Scheme for Concurrent Errors Detection
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...
Ilya Levin, Vladimir Ostrovsky, Osnat Keren, Vladi...
IOLTS
2003
IEEE
126views Hardware» more  IOLTS 2003»
13 years 10 months ago
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
Kartik Mohanram, Egor S. Sogomonyan, Michael G&oum...