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» Low Power Techniques for Digital GaAs VLSI
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GLVLSI
1999
IEEE
68views VLSI» more  GLVLSI 1999»
13 years 9 months ago
Low Power Techniques for Digital GaAs VLSI
José Francisco López, Roberto Sarmie...
VLSID
1996
IEEE
141views VLSI» more  VLSID 1996»
13 years 9 months ago
Ultra low power digital signal processing
Anantha Chandrakasan
ISQED
2000
IEEE
131views Hardware» more  ISQED 2000»
13 years 9 months ago
Low Power Testing of VLSI Circuits: Problems and Solutions
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
Patrick Girard
DAC
1995
ACM
13 years 8 months ago
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
Srinivas Devadas, Sharad Malik