4 search results - page 1 / 1 » Low power 8T SRAM using 32nm independent gate FinFET technol... |
SOCC
2008
IEEE
13 years 12 months ago
2008
IEEE
In this paper, new SRAM cell design methods for FinFET technology are proposed. One of the most important features of FinFET is that the independent front and back gate can be bia...
ASPDAC
2010
ACM
13 years 2 months ago
2010
ACM
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
TVLSI
2010
13 years 5 days ago
2010
Process-induced variations and sub-threshold leakage in bulk-Si technology limit the scaling of SRAM into sub-32 nm nodes. New device architectures are being considered to improve ...
VLSID
2006
IEEE
13 years 11 months ago
2006
IEEE
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...