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» Lower Bound Estimation for Low Power High-Level Synthesis
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DAC
1997
ACM
14 years 1 months ago
System-Level Synthesis of Low-Power Hard Real-Time Systems
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
Darko Kirovski, Miodrag Potkonjak
DAC
2005
ACM
14 years 10 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
RTSS
1998
IEEE
14 years 1 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
14 years 27 days ago
Estimation and bounding of energy consumption in burst-mode control circuits
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less)controlcircuits. The circuit specifications consideredare extended burst-m...
Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick,...
ISCAS
1995
IEEE
107views Hardware» more  ISCAS 1995»
14 years 27 days ago
Power Dissipation in Deep Submicron CMOS Digital Circuits
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
R. X. Gu, Mohamed I. Elmasry