129 search results - page 2 / 26 » Lower bounds on power dissipation for DSP algorithms |
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
ISVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
ICCD
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
GLVLSI
2000
IEEE
13 years 9 months ago
2000
IEEE
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Various coding schemes have been proposed in literature to encode the input signal...
ICCAD
1998
IEEE
13 years 9 months ago
1998
IEEE
Presented in this paper are 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy...