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» Mapping functions and data redistribution for parallel files
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ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
11 years 8 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
ICDE
2010
IEEE
248views Database» more  ICDE 2010»
14 years 5 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
13 years 11 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 4 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
ISCAPDCS
2001
13 years 7 months ago
End-user Tools for Application Performance Analysis Using Hardware Counters
One purpose of the end-user tools described in this paper is to give users a graphical representation of performance information that has been gathered by instrumenting an applica...
Kevin S. London, Jack Dongarra, Shirley Moore, Phi...