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» Mapping the LU decomposition on a many-core architecture: ch...
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CF
2009
ACM
9 years 7 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
EUROPAR
2010
Springer
9 years 2 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
ICCD
2004
IEEE
148views Hardware» more  ICCD 2004»
9 years 10 months ago
Many-to-Many Core-Switch Mapping in 2-D Mesh NoC Architectures
In this paper, we investigate the core-switch mapping(CSM) problem that optimally maps cores onto an NoC architecture such that either the energy consumption or the congestion is ...
Chan-Eun Rhee, Han-You Jeong, Soonhoi Ha
DAC
2009
ACM
10 years 2 months ago
Double patterning lithography friendly detailed routing with redundant via consideration
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
Kun Yuan, Katrina Lu, David Z. Pan
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