20 search results - page 4 / 4 » Massively multi-topology sizing of analog integrated circuit... |
DAC
2009
ACM
13 years 11 months ago
2009
ACM
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
GLVLSI
1998
IEEE
13 years 9 months ago
1998
IEEE
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...
JETC
2008
13 years 3 months ago
2008
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
CODES
2005
IEEE
13 years 10 months ago
2005
IEEE
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...