9 search results - page 2 / 2 » Minimization of dynamic and static power through joint assig... |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
VTS
2005
IEEE
13 years 10 months ago
2005
IEEE
Nanometer circuits are highly susceptible to soft errors generated by alpha-particle or atmospheric neutron strikes to circuit nodes. The reasons for the high susceptibility are t...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...