35 search results - page 4 / 7 » New subthreshold concepts in 65nm CMOS technology |
DT
2007
13 years 5 months ago
2007
This paper proposes a new heuristic approach to determine the input pattern that minimizes leakage currents of nanometer CMOS circuits during sleep mode considering stack and fano...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
A novel topology for Translinear (TL) loops comprising of CMOS Second Generation Current Conveyors (CC-II) and diodes is proposed. The proposed methodology opens a new paradigm to...
DATE
2009
IEEE
14 years 15 days ago
2009
IEEE
– The quest for technologies with superior device characteristics has showcased Carbon Nanotube Field Effect Transistors (CNFETs) into limelight. Among the several design aspects...
ISLPED
2009
ACM
14 years 8 days ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
ISCAS
2007
IEEE
14 years 1 days ago
2007
IEEE
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...