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» NoC monitoring: impact on the design flow
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ISCAS
2006
IEEE
87views Hardware» more  ISCAS 2006»
13 years 11 months ago
NoC monitoring: impact on the design flow
Abstract— Networks-on-chip (NoCs) are a scalable interconnect solution to large scale multiprocessor systems on chip and are rapidly becoming reality. As the ratio of embedded co...
Calin Ciordas, Kees Goossens, Andrei Radulescu, Tw...
DSD
2006
IEEE
72views Hardware» more  DSD 2006»
13 years 11 months ago
A Monitoring-Aware Network-on-Chip Design Flow
Networks-on-chip (NoC) are a scalable interconnect solution for systems on chip and are rapidly becoming reality. Monitoring is a key enabler for debugging or performance analysis...
Calin Ciordas, Andreas Hansson, Kees Goossens, Twa...
ASPDAC
2009
ACM
141views Hardware» more  ASPDAC 2009»
13 years 9 months ago
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri...
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
13 years 11 months ago
Flow regulation for on-chip communication
Abstract—We propose (σ, ρ)-based flow regulation as a design instrument for System-on-Chip (SoC) architects to control quality-of-service and achieve cost-effective communicat...
Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alista...
MMNS
2007
105views Multimedia» more  MMNS 2007»
13 years 6 months ago
Monitoring Flow Aggregates with Controllable Accuracy
In this paper, we show the feasibility of real-time flow monitoring with controllable accuracy in today’s IP networks. Our approach is based on Netflow and A-GAP. A-GAP is a prot...
Alberto Gonzalez Prieto, Rolf Stadler