69 search results - page 1 / 14 » Noise margin analysis for dynamic logic circuits |
ICCAD
2005
IEEE
14 years 1 months ago
2005
IEEE
ICCD
2000
IEEE
13 years 9 months ago
2000
IEEE
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
DAC
2000
ACM
14 years 5 months ago
2000
ACM
A dynamic noise model is developed and applied to analyze the noise immunity of precharge-evaluate circuits. Considering that the primary source of noise-injection in the circuit ...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
Dynamic noise analysis is greatly needed in place of traditional static noise analysis due to the ever increasingly stringent design requirement for VLSI chips based on very deep ...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, has been modified by introducing a pseudo-nMOS style load. The resultant circuit consumes less power, primar...