Sciweavers

8 search results - page 1 / 2
» On capture power-aware test data compression for scan-based ...
Sort
View
ET
2002
111views more  ET 2002»
13 years 4 months ago
Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST
In this paper a novel architecture for scan-based mixed mode BIST is presented. To reduce the storage requirements for the deterministic patterns it relies on a two-dimensional co...
Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wun...
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
13 years 10 months ago
Virtual Compression through Test Vector Stitching for Scan Based Designs
We propose a technique for compressing test vectors. The technique reduces test application time and tester memory requirements by utilizing part of the predecessor response in co...
Wenjing Rao, Alex Orailoglu
ICCAD
2008
IEEE
103views Hardware» more  ICCAD 2008»
14 years 1 months ago
On capture power-aware test data compression for scan-based testing
Large test data volume and high test power are two of the major concerns for the industry when testing large integrated circuits. With given test cubes in scan-based testing, the ...
Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, ...
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
13 years 8 months ago
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment
Growing test data volume and overtesting caused by excessive scan capture power are two of the major concerns for the industry when testing large integrated circuits. Various test...
Xiao Liu, Qiang Xu
DATE
2009
IEEE
94views Hardware» more  DATE 2009»
13 years 11 months ago
Improving compressed test pattern generation for multiple scan chain failure diagnosis
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. ...