14 search results - page 1 / 3 » On reducing both shift and capture power for scan-based test... |
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
TVLSI
2010
13 years 1 days ago
2010
DFT
2003
IEEE
13 years 10 months ago
2003
IEEE
For system-on-chip designs that contain an embedded processor, this paper present a software based diagnosis scheme that can make use of the processor to aid in diagnosis in a sca...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
Large test data volume and high test power are two of the major concerns for the industry when testing large integrated circuits. With given test cubes in scan-based testing, the ...