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VLSI
2010
Springer
12 years 11 months ago
A design workflow for dynamically reconfigurable multi-FPGA systems
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
Alessandro Panella, Marco D. Santambrogio, Frances...
SBCCI
2006
ACM
171views VLSI» more  SBCCI 2006»
13 years 11 months ago
Asynchronous circuit design on reconfigurable devices
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
CAI
2004
Springer
13 years 5 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl
FPL
2005
Springer
140views Hardware» more  FPL 2005»
13 years 10 months ago
A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Usama Malik, Oliver Diessel
ETFA
2006
IEEE
13 years 11 months ago
A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs
♦ To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its ...
Manuel G. Gericota, Luís F. Lemos, Gustavo ...