Sciweavers

348 search results - page 4 / 70
» PAM-Blox: High Performance FPGA Design for Adaptive Computin...
Sort
View
ISCAS
2005
IEEE
143views Hardware» more  ISCAS 2005»
13 years 11 months ago
Design and FPGA implementation of a structure of evolutionary digital filters for hardware implementation
— In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by ad...
Masahide Abe, Hiroki Arai, Masayuki Kawamata
IPPS
2007
IEEE
13 years 11 months ago
Design Alternatives for a High-Performance Self-Securing Ethernet Network Interface
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
Derek L. Schuff, Vijay S. Pai
FPL
2009
Springer
156views Hardware» more  FPL 2009»
13 years 10 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
DAC
2007
ACM
14 years 6 months ago
Enhancing FPGA Performance for Arithmetic Circuits
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Par...
CCGRID
2010
IEEE
13 years 4 months ago
An Adaptive Data Prefetcher for High-Performance Processors
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
Yong Chen, Huaiyu Zhu, Xian-He Sun