Sciweavers

230 search results - page 2 / 46
» PPM Reduction on Embedded Memories in System on Chip
Sort
View
SEUS
2009
IEEE
14 years 5 days ago
A Single-Path Chip-Multiprocessor System
Abstract. In this paper we explore the combination of a time-predictable chipmultiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main me...
Martin Schoeberl, Peter P. Puschner, Raimund Kirne...
DATE
2002
IEEE
130views Hardware» more  DATE 2002»
13 years 10 months ago
Assigning Program and Data Objects to Scratchpad for Energy Reduction
The number of embedded systems is increasing and a remarkable percentage is designed as mobile applications. For the latter, the energy consumption is a limiting factor because of...
Stefan Steinke, Lars Wehmeyer, Bo-Sik Lee, Peter M...
DATE
2005
IEEE
160views Hardware» more  DATE 2005»
13 years 11 months ago
SOC Testing Methodology and Practice
Abstract—On a commercial digital still camera (DSC) controller chip we practice a novel SOC test integration platform, solving real problems in test scheduling, test IO reduction...
Cheng-Wen Wu
GLVLSI
1999
IEEE
63views VLSI» more  GLVLSI 1999»
13 years 9 months ago
Memory Organization of a Single-Chip Video Signal Processing System with Embedded DRAM
Jörg Hilgenstock, Klaus Herrmann, Peter Pirsc...