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» Parallel saturating multioperand adders
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CASES
2000
ACM
13 years 9 months ago
Parallel saturating multioperand adders
This paper presents designs for parallel saturating multioperand adders. These adders have only a single carrypropagate adder on the critical delay path, yet produce the same resu...
Michael J. Schulte, Pablo I. Balzola, Jie Ruan, C....
ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
14 years 2 months ago
Design Alternatives for Parallel Saturating Multioperand Adders
Parallel saturating multioperand adders significantly improve the performance of GSM speech coders by giving compilers and assembly language programmers the ability to paralleliz...
Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C....
ARITH
2009
IEEE
14 years 5 hour ago
Multi-operand Floating-Point Addition
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
Alexandre F. Tenca
ASPDAC
2010
ACM
183views Hardware» more  ASPDAC 2010»
13 years 3 months ago
Multi-operand adder synthesis on FPGAs using generalized parallel counters
Multi-operand adders, which are also found in parallel multipliers, usually consist of the compression trees which reduce the number of operands per a bit to two, and the carrypro...
Taeko Matsunaga, Shinji Kimura, Yusuke Matsunaga
ASAP
2002
IEEE
170views Hardware» more  ASAP 2002»
13 years 10 months ago
Reviewing 4-to-2 Adders for Multi-Operand Addition
Recently there has been quite a number of papers discussing the use of redundant 4-to-2 adders for the accumulation of partial products in multipliers, claiming one type to be sup...
Peter Kornerup