Sciweavers

33 search results - page 2 / 7
» Parameter variations and impact on circuits and microarchite...
Sort
View
HPCA
2009
IEEE
13 years 11 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
DATE
2009
IEEE
167views Hardware» more  DATE 2009»
13 years 11 months ago
Analyzing the impact of process variations on parametric measurements: Novel models and applications
Abstract—In this paper we propose a novel statistical framework to model the impact of process variations on semiconductor circuits through the use of process sensitive test stru...
Sherief Reda, Sani R. Nassif
ASPDAC
2007
ACM
144views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method
With semiconductor fabrication technologies scaled below 100 nm, the design-manufacturing interface becomes more and more complicated. The resultant process variability causes a nu...
Alexander V. Mitev, Michael Marefat, Dongsheng Ma,...
ISQED
2009
IEEE
86views Hardware» more  ISQED 2009»
13 years 11 months ago
Uncriticality-directed scheduling for tackling variation and power challenges
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay has variability...
Toshinori Sato, Shingo Watanabe
DAC
2004
ACM
13 years 8 months ago
Leakage in nano-scale technologies: mechanisms, impact and design considerations
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, K...