149 search results - page 2 / 30 » Parametric Fault Simulation and Test Vector Generation |
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
— In this paper, we present a test generation framework for testing of quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted significant recent at...
DSD
2005
IEEE
13 years 11 months ago
2005
IEEE
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
We describe a transition fault model, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of at-speed test sequences...
ITC
1999
IEEE
13 years 9 months ago
1999
IEEE
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are ed to voltage behavior for use in voltage-level fault simulation and te...
FPL
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. We present an evaluation of accelerating fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is fre...