23 search results - page 2 / 5 » Pattern-based behavior synthesis for FPGA resource reduction |
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract—Reducing resource usage is one of the most important optimization objectives in behavioral synthesis due to its direct impact on power, performance and cost. The datapat...
ASPDAC
2009
ACM
13 years 12 months ago
2009
ACM
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...
FDL
2008
IEEE
13 years 11 months ago
2008
IEEE
There is an increasing need for automated conversion of high-level design descriptions into hardware. We present a flow that converts a software application written in the Brook ...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
ERSA
2004
13 years 6 months ago
2004
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...