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» Performance of Cluster-enabled OpenMP for the SCASH Software...
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CODES
2004
IEEE
13 years 8 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
IPPS
2000
IEEE
13 years 9 months ago
Thread Migration and Load Balancing in Non-Dedicated Environments
Networks of workstations are fast becoming the standard environment for parallel applications. However, the use of “found” resources as a platform for tightly-coupled runtime ...
Kritchalach Thitikamol, Peter J. Keleher
IEEEPACT
2008
IEEE
13 years 11 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
IEEEPACT
2003
IEEE
13 years 10 months ago
Reactive Multi-Word Synchronization for Multiprocessors
Shared memory multiprocessor systems typically provide a set of hardware primitives in order to support synchronization. Generally, they provide single-word read-modify-write hard...
Phuong Hoai Ha, Philippas Tsigas
CODES
2009
IEEE
13 years 11 months ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens