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» Perturbation-based Fault Screening
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DAC
2006
ACM
14 years 5 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
DFT
1999
IEEE
119views VLSI» more  DFT 1999»
13 years 9 months ago
RAMSES: A Fast Memory Fault Simulator
In this paper, we present a memory fault simulator called the Random Access Memory Simulator for Error Screening (RAMSES). Although it was designed based on some wellknown memory ...
Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu
AINA
2006
IEEE
13 years 10 months ago
Collaborative Fault Diagnosis in Grids through Automated Tests
Grids have the potential to revolutionize computing by providing ubiquitous, on demand access to computational services and resources. However, grid systems are extremely large, c...
Alexandre Duarte, Francisco Vilar Brasileiro, Walf...
DATE
2008
IEEE
119views Hardware» more  DATE 2008»
13 years 11 months ago
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
Drew C. Ness, David J. Lilja
ITC
2002
IEEE
86views Hardware» more  ITC 2002»
13 years 9 months ago
Incremental Diagnosis of Multiple Open-Interconnects
With increasing chip interconnect distances, openinterconnect is becoming an important defect. The main challenge with open-interconnects stems from its non-deterministic real-lif...
Jiang Brandon Liu, Andreas G. Veneris, Hiroshi Tak...