9 search results - page 1 / 2 » Piranha: a scalable architecture based on single-chip multip... |
ISCA
2000
IEEE
13 years 9 months ago
2000
IEEE
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
JSA
2010
12 years 11 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
CASES
2008
ACM
13 years 6 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—To accommodate the growing number of applications integrated on a single chip, Networks on Chip (NoC) must offer scalability not only on the architectural, but also on t...
FPGA
2006
ACM
13 years 8 months ago
2006
ACM
In this paper, we propose a new internally buffered crossbar (IBC) switching architecture where the input and output distributed schedulers are embedded inside the crossbar fabric...