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DAC
1997
ACM
13 years 9 months ago
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
Howard H. Chen, David D. Ling
ISCAS
1995
IEEE
107views Hardware» more  ISCAS 1995»
13 years 8 months ago
Power Dissipation in Deep Submicron CMOS Digital Circuits
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
R. X. Gu, Mohamed I. Elmasry
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi
VTS
2002
IEEE
128views Hardware» more  VTS 2002»
13 years 9 months ago
Power Supply Transient Signal Analysis Under Real Process and Test Hardware Models
A device testing method called Transient Signal Analysis (TSA) is subjected to elements of a real process and testing environment in this paper. Simulations experiments are design...
Abhishek Singh, Jim Plusquellic, Anne E. Gattiker