41 search results - page 1 / 9 » Process variation aware clock tree routing |
ISPD
2003
ACM
13 years 10 months ago
2003
ACM
ISPD
2006
ACM
13 years 10 months ago
2006
ACM
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
As the minimum feature sizes of VLSI circuits get smaller while the clock frequency increases, the effects of process variations become significant. We propose a UST/DME based ap...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
The synthesis of clock network in the presence of process variation is becoming a vital design issue towards the performance of digital circuits. In this paper, we propose a clock ...
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— In this paper, we have proposed a thermal aware routing based parameterization to generate a clock model that takes the stochastic temperature variation into consideration. The...