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» Quadruple Time Redundancy Adders
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DFT
2003
IEEE
99views VLSI» more  DFT 2003»
13 years 10 months ago
Quadruple Time Redundancy Adders
Whitney J. Townsend, Jacob A. Abraham, Earl E. Swa...
APCCAS
2006
IEEE
254views Hardware» more  APCCAS 2006»
13 years 11 months ago
Redundant Adders Consume Less Energy
— We conduct a complete analysis of the effect of digit redundancy in adders on their delay, power, energy, and energy-delay product. To our knowledge, this is the first such de...
Kavallur Gopi Smitha, H. A. H. Fahmy, A. Prasad Vi...
ASAP
2002
IEEE
170views Hardware» more  ASAP 2002»
13 years 10 months ago
Reviewing 4-to-2 Adders for Multi-Operand Addition
Recently there has been quite a number of papers discussing the use of redundant 4-to-2 adders for the accumulation of partial products in multipliers, claiming one type to be sup...
Peter Kornerup
ARITH
2009
IEEE
14 years 8 days ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
ETS
2006
IEEE
122views Hardware» more  ETS 2006»
13 years 9 months ago
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics
Online repair through reconfiguration is a particularly advantageous approach in the nanoelectronic environment since reconfigurability is naturally supported by the devices. Howe...
Wenjing Rao, Alex Orailoglu, Ramesh Karri